Generally, programmable devices, such as FPGAs, contain volatile memory registers that may store sensitive information. In particular, once the over-voltage detection circuit detects that the voltage applied to the programmable device exceeds a trigger voltage, it may cause logic circuitry to erase the sensitive information stored on the device. Desirably, the over-voltage detection circuit includes components arranged in such a way as to render current consumption negligible when the voltage applied to the programmable device, e.
ISBN 13: 9781461284994
Filed: April 29, Date of Patent: December 10, Assignee: Altera Corporation. Inventors: Bruce B. Pedersen, Dirk A. Current perpendicular magnetoresistive sensor with a dummy shield for capacitance balancing. Abstract: A perpendicular magnetic read head having a balanced capacitive coupling with the substrate.
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The read head includes a magnetoresistive sensor with first and second magnetic, electrically conductive shields separated from a substrate by a layer of non-magnetic, electrically insulating material. A dummy magnetic shield is formed on the non-magnetic electrically insulating layer and is electrically connected with the second magnetic, electrically conductive shield.
The dummy shield is formed to have a capacitive coupling with the substrate that matches the capacitive coupling of the first magnetic, electrically conductive shield with the substrate. Filed: August 27, Date of Patent: June 25, Inventors: Diane L. Brown, David J. Electrostatic discharge protection circuit for magneto-resistive read elements. Abstract: A read head circuit includes a read element configured to read data stored magnetically on a platter and includes first and second terminals.
A write element writes data on the platter. A normally-ON transistor includes first, second and control terminals. The first and second terminals of the transistor are connected to a respective one of the first and second terminals of the read element. The control terminal receives a control voltage referenced from a power terminal. The power terminal powers the read element or the write element.
Responsive to the control terminal being powered by the power terminal, the normally-ON transistor provides an open circuit between the first terminal of the read element and the second terminal of the read element. Responsive to the control terminal not being powered by the power terminal, the normally-ON transistor shorts the first and second terminals of the read element. Filed: April 2, Date of Patent: June 11, Structure in a high voltage path of an ultra-high voltage device for providing ESD protection.
Abstract: An ultra-high voltage device has a high voltage path established from a high voltage N-well through a first metal layer to a second metal layer, and a contact plug electrically connected between the high voltage N-well and the first metal layer. The contact plug has a distributed structure on a horizontal layout to improve the uniformity of the ultra-high voltage device such that the current in the high voltage path will be more uniform distributed so as to avoid the localized heat concentration caused by non-uniform current distribution that would damage the ultra-high voltage device.
Multiple fuse apparatus are preferably connected to the first metal layer individually. Each the fuse apparatus includes a poly fuse to be burnt down when an over-load current flows therethrough. Filed: April 21, Date of Patent: January 22, Assignee: Richtek Technology Corp.
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Inventor: Jian-Hsing Lee. Magnetic head having reduced cost electrostatic discharge shunt. Abstract: A method for manufacturing a magnetic head with an electrostatic discharge resistor for preventing electrostatic discharge damage to magnetic head. The electrostatic discharge resistor is formed by a processes that saves manufacturing time and cost by forming resistor in the same deposition and patterning steps used to form the magnetoresistive sensor. However, the resistor includes only a portion of the layers used to form the magnetoresistive sensor, thereby ensuring that the resistor will have sufficient resistivity.
Filed: September 24, Date of Patent: September 18, Electrostatic discharge ESD protection circuit. Abstract: An electrostatic discharge ESD protection circuit that includes a parallel connection of parasitic vertical and lateral bipolar junction transistors BJTs each with a floating base and a metal oxide semiconductor MOS field transistor with a floating body is disclosed. The three transistors may be connected in parallel between a bond input or output pad and a substantially fixed voltage level e.
The parasitic BJTs and the field transistor may be configured to remain cut off so long as an input voltage at the pad is between a negative V1 voltage? Filed: May 6, Date of Patent: August 28, Assignee: Micron Technology, Inc.
Inventor: Joohyun Jin. Publication date: August 23, Applicant: International Business Machines Corporation. Filed: January 16, Date of Patent: June 12, Abstract: A structure for preventing Electrostatic Discharge LSD damage to a magnetoresistive sensor during manufacture. The switch could also be a programmable resistor that includes to solid electrolyte sandwiched between first and second electrodes. Filed: June 27, Date of Patent: May 1, Method and apparatus for the prevention of electrostatic discharge ESD by a hard drive magnetic head involving the utilization of anisotropic conductive paste ACP in the securement to a head-gimbal assembly HGA.
Abstract: A system and method for the prevention of electrostatic discharge ESD by a hard drive magnetic head is disclosed. The magnetic head is secured to a head-gimbal assembly HGA by anisotropic conductive paste ACP to provide an improved electrostatic discharge path. Filed: July 26, Date of Patent: April 17, Abstract: A read head circuit includes a read element configured to read data stored magnetically on a platter. A normally-ON transistor includes a first terminal, a second terminal and a control terminal. The first terminal is directly connected to the first terminal of the read element.
A second terminal is directly connected to the second terminal of the read element. Responsive to the control terminal being powered, the normally-ON transistor provides an open circuit between the first terminal of the read element and the second terminal of the read element.
Responsive to the control terminal not being powered, the normally-ON transistor is configured to short the first terminal of the read element to the second terminal of the read element. Filed: December 14, Date of Patent: April 3, Multi-channel thin-film magnetic head and magnetic tape drive apparatus with the multi-channel thin-film magnetic head.
Abstract: A multi-channel thin-film magnetic head includes a substrate, a plurality of MR read head elements, a plurality of first resistive elements, and a second resistive element. Each MR read head element includes a lower magnetic shield layer, an upper magnetic shield layer, and an MR layer arranged between the lower magnetic shield layer and the upper magnetic shield layer. Each first resistive element has a first resistance value. One ends of the first resistive elements are connected to the lower magnetic shield layers or the upper magnetic shield layers of the MR read head elements, respectively.
The second resistive element has a second resistance value that is higher than the first resistance value. One end of the second resistive element is commonly connected to the other ends of the plurality of first resistive elements. The other end of the second resistive element is grounded. Filed: October 30, Date of Patent: March 6, Assignee: TDK Corporation.
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Inventor: Nozomu Hachisuka. Electrostatic discharge protection method and device for semiconductor device including an electrostatic discharge protection element providing a discharge path of a surge current. Filed: March 4, Date of Patent: February 14, Assignee: Renesas Electronics Corporation. Inventor: Takayuki Nagai. Abstract: In one embodiment, a system includes a cable comprising a plurality of leads and an ESD dissipating adhesive coupled to the plurality of leads in a coverage area for providing ESD protection to an element of an electronic device.
The ESD adhesive comprises a mixture of a polymeric thin film and electrically conductive fillers dispersed in the film, and the ESD adhesive has a resistivity from about 50 to M?. In another embodiment, a method for providing ESD protection to an element of an electronic device includes applying an ESD adhesive across exposed leads of a cable and evaporating the solvent from the ESD adhesive.
At least some of the leads are coupled to an element of an electronic device. The ESD adhesive comprises a polymeric thin film, electrically conductive fillers dispersed in the polymeric thin film, and a solvent for controlling a viscosity of the ESD adhesive. Filed: August 6, Publication date: February 9, Inventors: William T. Bandy, IV, Dylan J. Boday, Icko E. Iben, Wayne A.
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The shunt includes highly resistive interconnections between upper and lower shields of the read head and a grounded slider substrate and a low resistance interconnection between the lower pole piece of the write head and the substrate. The capacitances between the pole piece and the upper shield, the upper shield and the lower shield and the lower shield and the substrate are made equal by either forming the shields and pole piece with equal surface areas and separating them with dielectrics of equal thicknesses, or by keeping the ratio of area to insulator thicknesses equal.
Filed: June 19, Date of Patent: January 31, Assignees: Headway Technologies, Inc. Abstract: A protective device for protecting an electronic device, e. A second port with one-to-one electrical connection to each lead in the cable provides a second electrical access to the all leads. A shorting device is coupled to one of the ports thereby creating a short between both the leads of the extension and the leads of the cable.
The other port is available for coupling to an external device, e.
Filed: July 18, Date of Patent: December 27, Inventor: Icko E. Tim Iben. Method for preventing erroneous resetting of electronic device due to electrostatic discharge. Abstract: An exemplary method for preventing an electronic device from erroneously resetting due to electrostatic discharge ESD involves an electronic device that includes a reset control pin. The method includes providing a timer, and setting a reset condition of the reset control pin. If the reset condition is satisfied, the electronic device resets. The method includes appropriately setting the reset condition of the electronic device.
The reset condition can virtually never be satisfied by an ESD. Thus, the electronic device is efficiently prevented from erroneously resetting due to ESD. Filed: December 7, Date of Patent: September 13, Assignee: Chimei Innolux Corporation.provrecoupsubtmabt.tk
ESD from A to Z Electrostatic Discharge Control for Electronics pdf
Inventor: Ying-Tai Chen. Tester with virtual ground.
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Abstract: A tester system includes a tester and a radioactive isotope source. The tester includes a spindle assembly, a disk mounted to the spindle assembly, and a head actuatable over the disk. The radioactive isotope source is positioned in an ionizing location proximate the tester, such that a minimum distance between the radioactive isotope source and an axis of rotation of the disk is less than a radius of the disk. Filed: March 19, Date of Patent: August 23, Assignee: Western Digital Technologies, Inc.
Inventors: Michael Nojaba, Pradeep K.
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